View RT8089A_7547436.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

RT8089A ? ds8089a-01 march 2013 www.richtek.com 1 copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? applications z portable instruments z battery powered equipment z notebook computers z distributed power systems z ip phones z digital cameras 3a, 1mhz, synchronous step-down converter general description the RT8089A is a high efficiency synchronous, step-down dc/dc converter. its input voltage ranges from 2.7v to 5.5v that provides an adjustable regulated output voltage from 0.6v to v in while delivering up to 3a of output current. the internal synchronous low on-resistance power switches increase efficiency and eliminate the need for an external schottky diode. the switching frequency is fixed internally at 1mhz. the 100% duty cycle provides low dropout operation, hence extending battery life in portable systems. current mode operation with internal compensation allows the transient response to be optimized over a wide range of loads and output capacitors. the RT8089A is available in a wdfn-10l 3x3 package. features z z z z z high efficiency : up to 95% z z z z z high efficiency at light load z z z z z low r ds(on) power switches : 69m /49m z z z z z fixed frequency : 1mhz z z z z z no schottky diode required z z z z z internal compensation z z z z z 0.6v reference allows low output voltage z z z z z low dropout operation : 100% duty cycle z z z z z ocp, uvp, otp z z z z z rohs compliant and halogen free simplified application circuit ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. marking information 2x= : product code ymdnn : date code package type qw : wdfn-10l 3x3 (w-type) RT8089A lead plating system g : green (halogen free and pb free) gnd sw RT8089A v out vin fb v in pgood en vcc pgood chip enable 2x=ym dnn
RT8089A 2 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? pin no. pin name pin function 1 fb feedback input. this pin receives the feedback voltage from a resistive voltage divider connected across the output. 2 vcc supply voltage input. decouple this pin to gnd with at least 1 f ceramic cap. 3 vin power input. decouple this pin to gnd with at least 10 f ceramic cap. 4, 5, 11 (ex pos ed p ad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 6, 7 sw switch node. connect this pin to the inductor. 8 nc no internal connection. 9 pgood power good indicator. this pin is an open drain logic output. the pgood will be pulled to ground when the output voltage is less than 90% of the target output voltage. 10 en enable control input. pull high the en pin to turn on the converter. functional pin description pin configurations (top view) wdfn-10l 3x3 9 8 7 1 2 3 4 5 10 6 gnd 11 fb gnd vin gnd vcc en sw pgood nc sw
RT8089A 3 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? function block diagram operation the RT8089A is a synchronous low voltage buck converter that can support the input voltage range from 2.7v to 5.5v and the output current can be up to 3a. the RT8089A uses a constant frequency, current mode architecture. in normal operation, the high side p-mosfet is turned on when the switch controller is set by the oscillator (osc) and is turned off when the current comparator resets the switch controller. high side mosfet peak current is measured by internal rsense. the current signal is where slope compensator works together with sensing voltage of rsense. the error amplifier ea adjusts comp voltage by comparing the feedback signal (v fb ) from the output voltage with the internal 0.6v reference. when the load current increases, it causes a drop in the feedback voltage relative to the reference, the comp voltage then rises to allow higher inductor current to match the load current. uv comparator if the feedback voltage (v fb ) is lower than threshold voltage 0.2v, the uv comparator's output will go high and the switch controller will turn off the high side mosfet. oscillator (osc) the internal oscillator runs at nominal frequency 1mhz. pgood comparator when the feedback voltage (v fb ) is higher than threshold voltage 0.54v, the pgood open drain output will be high impedance. enable there is an internal pull down 500k resistor at en pin. when the en pin is higher than 1.6v, the converter will be turned on. the en pin can be connected to vin through a 100k resistor for automatic startup. soft-start (ss) an internal current source charges an internal capacitor to build the soft-start ramp voltage. the v fb voltage will track the internal ramp voltage during soft-start interval. the typical soft-start time is 700 s. driver nisen control logic current limit 0.54v 0.2v oc limit isen slope com osc output clamp ea 0.6v int-ss por otp en fb vin vcc en sw pgood pgood v ref uv pgood gnd
RT8089A 4 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? parameter symbol test conditions min typ max unit feedback reference voltage v ref 0.594 0.6 0.606 v feedback leakage current i fb -- 0.1 0.4 a active , v fb = 0.7v, not switching -- 110 170 dc bias current shutdown -- -- 1 a output voltage line regulation v in = 2.7v to 5.5v, i out = 0a -- 0.3 -- %/v output voltage load regulation i out = 0a to 3a ? 1 -- 1 % switch leakage current -- -- 1 a switching frequency 0.8 1 1.2 mhz high side r ds(on)_p v in = 5v -- 69 -- switch on resistance low side r ds(on)_n v in = 5v -- 49 -- m p-mosfet current limit i lim 4.8 -- -- a v cc rising 2.2 2.4 2.6 under voltage lockout threshold v uvlo v cc falling 2 2.2 2.4 v logic-high v ih 1.6 -- -- en input voltage logic-low v il -- -- 0.4 v en pull low resistance -- 500 -- k over temperature protection t sd -- 150 -- c (v in = 3.3v, t a = 25 c, unless otherwise specified) electrical characteristics recommended operating conditions (note 4) z supply input voltage, vin, vcc ----------------------------------------------------------------------------------- 2.7v to 5.5v z junction temperature range ---------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ---------------------------------------------------------------------------------------- ? 40 c to 85 c absolute maximum ratings (note 1) z supply input v oltage, vin, vcc ----------------------------------------------------------------------------------- ? 0.3v to 6.5v z sw pin dc ------------------------------------------------------------------------------------------------------------------------- ( v in + 0.3v) to 6.8v < 20ns ------------------------------------------------------------------------------------------------------------------- ? 2.5v to 9v z other pins --------------------------------------------------------------------------------------------------------------- ? 0.3v to 6.5v z power dissipation, p d @ t a = 25 c wdf n-10l 3x3 --------------------------------------------------------------------------------------------------------- 1.429w z package thermal resistance (note 2) wdfn-10l 3x3, ja --------------------------------------------------------------------------------------------------- 70 c/w wdfn-10l 3x3, jc --------------------------------------------------------------------------------------------------- 8.2 c/w z lead temperature (soldering, 10 se c.) --------------------------------------------------------------------------- 260 c z junction temperature ------------------------------------------------------------------------------------------------- 150 c z storage temperature range ---------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body model) ------------------------------------------------------------------------------------------ 2kv
RT8089A 5 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? parameter symbol test conditions min typ max unit over temperature protection hysteresis -- 20 -- c soft-start time t ss -- 700 -- s v out discharge resistance -- 100 -- v out under voltage protection (latch-off) -- 33 40 % power good measures fb, with respect to v ref 85 90 -- % power good hysteresis -- 5 -- % note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a high effective thermal conductivity four-layer test board per jedec 51-7. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT8089A 6 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? typical application circuit table 1. recommended component selection v out (v) r1 (k ) r2 (k ) c ff (pf) l ( h) c ou t ( f) 3.3 37 8.2 430 2 22 x 2 2.5 26 8.2 430 2 22 x 2 1.8 16.5 8.2 510 1.5 22 x 2 1.5 12.3 8.2 560 1.5 22 x 2 1.2 8.2 8.2 620 1.5 22 x 2 1 5.6 8.2 680 1.5 22 x 2 l gnd sw RT8089A v out fb r1 r2 c ff en c out chip enable 10 6, 7 1 4, 5, 11 (exposed pad) 1.5h 6.2k 8.2k 560pf 1.05v 22f x 2 vin v in c in vcc c1 10f 1f 3 2 100k pgood r3 pgood 9
RT8089A 7 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? typical operating characteristics efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0.001 0.01 0.1 1 10 output current (a) efficiency (%) i out = 0a to 3a v in = 5v, v out = 3.3v v in = 3.3v, v out = 1.05v v in = 5v, v out = 1.05v output voltage vs. output current 1.01 1.02 1.03 1.04 1.05 1.06 1.07 0 0.5 1 1.5 2 2.5 3 output current (a) output voltage (v) v out = 1.05v, i out = 0a to 3a v in = 5v v in = 3.3v output voltage vs. output current 3.28 3.29 3.30 3.31 3.32 3.33 3.34 0 0.5 1 1.5 2 2.5 3 output current (a) output voltage (v) v in = 5v, v out = 3.3v, i out = 0a to 3a switching frequency vs. temperature 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 125 temperature (c) switching frequency (mhz) 1 v in = 3.3v v in = 5v v out = 1.05v, i out = 0.6a switching frequency vs. temperature 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 125 temperature (c) switching frequency (mhz) 1 v in = 5v, v out = 3.3v, i out = 0.6a reference voltage vs. temperature 0.55 0.56 0.57 0.58 0.59 0.60 0.61 0.62 0.63 0.64 0.65 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) i out = 0.6a
RT8089A 8 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? uvlo threshold vs. temperature 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 -50 -25 0 25 50 75 100 125 temperature (c) uvlo threshold (v) rising falling en threshold voltage vs. temperature 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 -50 -25 0 25 50 75 100 125 temperature (c) en threshold voltage (v ) rising falling time (100 s/div) load transient response v out (50mv/div) i out (2a/div) v in = 5v, v out = 1.05v, i out = 1a to 4a time (100 s/div) load transient response v out (100mv/div) i out (2a/div) v in = 5v, v out = 3.3v, i out = 1a to 4a time (500ns/div) output ripple voltage v out (10mv/div) v sw (5v/div) v in = 5v, v out = 1.05v, i out = 4a time (500ns/div) output ripple voltage v out (10mv/div) v sw (5v/div) v in = 5v, v out = 3.3v, i out = 4a
RT8089A 9 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? time (2.5ms/div) power on from vin v out (1v/div) v in (5v/div) i out (5a/div) v pgood (10v/div) v in = 5v, v out = 1.05v, i out = 4a time (5ms/div) power off from vin v out (1v/div) v in (5v/div) i out (5a/div) v pgood (10v/div) v in = 5v, v out = 1.05v, i out = 4a time (2.5ms/div) power on from vin v out (5v/div) v in (5v/div) i out (5a/div) v pgood (10v/div) v in = 5v, v out = 3.3v, i out = 4a time (5ms/div) power off from vin v out (5v/div) v in (5v/div) i out (5a/div) v pgood (10v/div) v in = 5v, v out = 3.3v, i out = 4a time (500 s/div) power off from en v out (1v/div) v en (5v/div) i out (5a/div) v pgood (5v/div) v in = 5v, v out = 1.05v, i out = 4a time (500 s/div) power on from en v out (1v/div) v en (5v/div) i out (5a/div) v pgood (5v/div) v in = 5v, v out = 1.05v, i out = 4a
RT8089A 10 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? time (500 s/div) power on from en v out (2v/div) v en (5v/div) i out (5a/div) v pgood (5v/div) v in = 5v, v out = 3.3v, i out = 4a time (500 s/div) power off from en v out (2v/div) v en (5v/div) i out (5a/div) v pgood (5v/div) v in = 5v, v out = 3.3v, i out = 4a
RT8089A 11 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? application information the RT8089A is a single-phase step-down converter. it provides single feedback loop, current mode control with fast transient response. an internal 0.6v reference allows the output voltage to be precisely regulated for low output voltage applications. a fixed switching frequency (1mhz) oscillator and internal compensation are integrated to minimize external component count. protection features include over current protection, under voltage protection and over temperature protection. output voltage setting connect a resistive voltage divider at the fb between v out and gnd to adjust the output voltage. the output voltage is set according to the following equation : chip enable and disable the en pin allows for power sequencing between the controller bias voltage and another voltage rail. the RT8089A remains in shutdown if the en pin is lower than 400mv. when the en pin rises above the v en trip point, the RT8089A begins a new initialization and soft-start cycle. internal soft-start the RT8089A provides an internal soft-start function to prevent large inrush current and output voltage overshoot when the converter starts up. the soft-start (ss) automatically begins once the chip is enabled. during soft- start, the internal soft-start capacitor becomes charged and generates a linear ramping up voltage across the capacitor. this voltage clamps the voltage at the fb pin, causing pwm pulse width to increase slowly and in turn reduce the output surge current. the internal 0.6v reference takes over the loop control once the internal ramping-up voltage becomes higher than 0.6v. uvlo protection the RT8089A has input under voltage lockout protection (uvlo). if the input voltage exceeds the uvlo rising threshold voltage (2.4v typ.), the converter resets and prepares the pwm for operation. if the input voltage falls below the uvlo falling threshold voltage during normal operation, the device will stop switching. the uvlo rising and falling threshold voltage has a hysteresis to prevent noise-caused reset. the power sequence of the vcc and vin need to be considered if they are powered separately. the driver voltage of high side mosfet comes from vin input and internal control circuit is powered by vcc. the vcc has to be powered earlier than the vin to ensure that the high side mosfet never turns on before the internal control circuit is ready. at power off, the voltage at the vin has to be removed before the vcc voltage goes below the threshold of uvlo. inductor selection the switching frequency (on-time) and operating point (% ripple or lir) determine the inductor value as shown below: ( ) out in out sw load(max) in vv v l = f lir i v ? where lir is the ratio of the peak-to-peak ripple current to the average inductor current. find a low loss inductor having the lowest possible dc resistance that fits in the allotted dimensions. ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200khz. the core must be large enough not to saturate at the peak inductor current (i peak ) : peak load(max) load(max) lir i = i + i 2 ?? ?? ?? out ref r1 v = v 1 r2 ?? + ?? ?? where v ref is the feedback reference voltage 0.6v (typ.). figure 1. setting v out with a voltage divider fb gnd v out r1 r2 the calculation above serves as a general reference. to further improve transient response, the output inductor can be further reduced. this relation should be considered along with the selection of the output capacitor.
RT8089A 12 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? out out in_rms load in in vv i = i 1 vv ?? ? ?? ?? the next step is selecting a proper capacitor for rms current rating. one good design is using more than one capacitor with low equivalent series resistance (esr) in parallel to form a capacitor bank. the input capacitance value determines the input ripple voltage of the regulator. the input voltage ripple can be approximately calculated using the following equation : out(max) in in sw i0.25 v = cf output capacitor selection the output capacitor and the inductor form a low pass filter in the buck topology. in steady state condition, the ripple current flowing into/out of the capacitor results in ripple voltage. the output voltage ripple (v p-p ) can be calculated by the following equation : p_p load(max) out sw 1 v= liri esr + 8c f ?? ?? ?? for a given output voltage sag specification, the esr value can be determined. when load transient occurs, the output capacitor supplies the load current before the controller can respond. therefore, the esr will dominate the output voltage sag during load transient. the output voltage undershoot (v sag ) can be calculated by the following equation : sag load v = i esr ? input capacitor selection high quality ceramic input decoupling capacitor, such as x5r or x7r, with values greater than 10 f are recommended for the input capacitor. the x5r and x7r ceramic capacitors are usually selected for power regulator capacitors because the dielectric material has less capacitance variation and more temperature stability. voltage rating and current rating are the key parameters when selecting an input capacitor. generally, selecting an input capacitor with voltage rating 1.5 times greater than the maximum input voltage is a conservatively safe design. the input capacitor is used to supply the input rms current, which can be approximately calculated using the following equation : another parameter that has influence on the output voltage sag is the equivalent series inductance (esl). the rapid change in load current results in di/dt during transient. therefore, the esl contributes to part of the voltage sag. using a capacitor with low esl can obtain better transient performance. generally, using several capacitors connected in parallel can have better transient performance than using a single capacitor for the same total esr. unlike the electrolytic capacitor, the ceramic capacitor has relatively low esr and can reduce the voltage deviation during load transient. however, the ceramic capacitor can only provide low capacitance value. therefore, use a mixed combination of electrolytic capacitor and ceramic capacitor to obtain better transient performance. power good output (pgood) pgood is an open-drain type output and requires a pull- up resistor. pgood is actively held low in soft-start, standby, and shutdown. it is released when the output voltage rises above 90% of nominal regulation point. the pgood signal goes low if the output is turned off or is 10% below its nominal regulation point. under voltage protection (uvp) the output voltage can be continuously monitored for under voltage. when under voltage protection is enabled, both ugate and lgate gate drivers will be forced low if the output is less than 33% of its set voltage threshold. the uvp will be ignored for at least 3ms (typ.) after start up or a rising edge on the en threshold. toggle en threshold or cycle v in to reset the uvp fault latch and restart the controller. over current protection (ocp) the RT8089A provides over current protection by detecting high side mosfet peak inductor current. if the sensed peak inductor current is over the current limit threshold, the ocp will be triggered. when ocp is tripped, the RT8089A will keep the over current threshold level until the over current condition is removed.
RT8089A 13 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? thermal shutdown (otp) the device implements an internal thermal shutdown function when the junction temperature exceeds 150 c. the thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal shutdown threshold. once the die temperature decreases below the hysteresis of 20 c, the device reinstates the power up sequence. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for wdfn-10l 3x3 package, the thermal resistance, ja , is 70 c/w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formulas : p d(max) = (125 c ? 25 c) / (70 c/w) = 1.429w for wdfn-10l 3x3 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance. the derating curve in figure 2 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 2. derating curve of maximum power dissipation layout considerations layout is very important in high frequency switching converter design. the pcb can radiate excessive noise and contribute to converter instability with improper layout. certain points must be considered before starting a layout using the RT8089A. ` make the traces of the main current paths as short and wide as possible. ` put the input capacitor as close as possible to the device pins (v in and gnd). ` sw node encounters high frequency voltage swings so it should be kept in a small area. keep sensitive components away from the sw node to prevent stray capacitive noise pick-up. ` ensure all feedback network connections are short and direct. place the feedback network as close to the chip as possible. ` the gnd pin and exposed pad should be connected to a strong ground plane for heat sinking and noise protection. ` an example of pcb layout guide is shown in figure 3 for reference. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
RT8089A 14 ds8089a-01 march 2013 www.richtek.com copyright 2013 richtek technology corporation. all rights reserved. is a registered trademark of ri chtek technology corporation. ? figure 3. pcb layout guide c in1 v out c out gnd v out input capacitor must be placed as close to the ic as possible. sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace. the output capacitor must be placed near the ic. the voltage divider must be connected as close to the device as possible. 9 8 7 1 2 3 4 5 10 6 gnd 11 fb gnd vin gnd vcc en sw pgood nc sw r2 r1 r pgood r en l v in c in2
RT8089A 15 ds8089a-01 march 2013 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. outline dimension dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.180 0.300 0.007 0.012 d 2.950 3.050 0.116 0.120 d2 2.300 2.650 0.091 0.104 e 2.950 3.050 0.116 0.120 e2 1.500 1.750 0.059 0.069 e 0.500 0.020 l 0.350 0.450 0.014 0.018 w-type 10l dfn 3x3 package 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options d 1 e a3 a a1 d2 e2 l b e see detail a

▲Up To Search▲

Price & Availability of RT8089A

	To Download RT8089A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .